Currently, there are several basic PLAs available on the market. A first group of PLAs, field programmable logic arrays (FPLA), has both a programmable AND array and a programmable OR array, which can be programmed for specific sum of products calculations.
Referring to FIG. 1, a field programmable logic array (FPLA) 10 is made of the following elements: input bus 12, programmable matrix 14, logical AND gates 16, programmable matrix 16, logical OR gates 20, and output bus 22.
The advantage of this configuration gives the FPLA user the option of providing, or not, a connection between any one of the input signals from bus 12 to any one of the output lines of bus 22 via programmable matrix 14, logical AND gates 16, programmable matrix 18, and logical OR gates 20.
The user can provide each logical AND gate and each logical OR gate a unique output signal dependent on a particular set of input signals. The output signals from the FPLA provides for a programmable "sum of products terms."
A second group of PLAs, is known as a programmable array logic devices, known as a PAL, which is a registered trademark of Advanced Micro Devices Inc. A PAL has a programmable AND array and a fixed OR array.
Both the FPLA and PAL architectures have relative advantages and disadvantages. The FPLA offers a high degree of functional flexibility. The PAL has a fast operating speed. The FPLA is slower since a programmable OR array is slower than a dedicated OR array. Similarly, the
does not have the flexibility provided by the FPLA.
Some attempts have been made to combine both functional flexibility and speed. However, such attempts usually ended by sacrificing circuit density for functionality while not providing the speed available from a PAL.
Therefore, a need exists for an IC which has the speed of a PAL and the flexibility of a FPLA.